| Four-Level, Programmable Tamper-Response Hierarchy
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| Selectable Memory Clearing
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| Four Independent Tamper-Detection Interrupt Outputs
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| 8kB Battery-Backed Key Memory with High-Speed Erase
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| Controls External SRAM for Battery-Backup Operation and Optional Tamper Event Erase
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| Programmable Power Consumption
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| Battery-Backup Controller
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| 64-Bit Unique Silicon Serial Number |