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MAX1420
12位、60Msps、+3.3V、低功耗ADC,内置电压基准


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概述
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The MAX1420, 3.3V, 12-bit analog-to-digital converter (ADC) features a fully-differential input, pipelined, 12-stage ADC architecture with wideband track-and-hold (T/H) and digital error correction, incorporating a fully-differential signal path. The MAX1420 is optimized for low-power, high dynamic performance applications in imaging and digital communications. The converter operates from a single 3.3V supply, and consumes only 221mW. The fully-differential input stage has a small signal -3dB bandwidth of 400MHz and may be operated with single-ended inputs.

An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure accommodates an internal reference, or externally applied buffered or unbuffered reference for applications that require increased accuracy and a different input voltage range.

In addition to low operating power, the MAX1420 features two power-down modes: reference power-down and shutdown mode. In reference power-down, the internal bandgap reference is deactivated, which results in a typical 2mA supply current reduction. A full shutdown mode is available to maximize power savings during idle periods.

The MAX1420 provides parallel, offset binary, CMOS-compatible three-state outputs.

The MAX1420 is available in a 7mm x 7mm x 1.4mm, 48-pin TQFP package, and is specified over the commercial (0°C to +70°C) and the extended industrial (-40°C to +85°C) temperature range.

Pin-compatible lower speed versions of the MAX1420 are also available. Please refer to the MAX1421 data sheet for 40Msps and the MAX1422 data sheet for 20Msps.

关键特性   应用/使用
  • 3.3V Single Power Supply
  • 67dB SNR at fIN = 5MHz
  • 66dB SNR at fIN = 15MHz
  • Internal 2.048V Precision Bandgap Reference
  • Differential, Wideband Input T/H Amplifier
  • Power-Down Modes
    • 218mW (Reference Shutdown Mode)
    • 10µW (Shutdown Mode)
  • Space-Saving 48-Pin TQFP Package

 
  • CCD像素处理
  • 中频与基带数字化
  • IR焦平面矩阵
  • 医疗超声成像
  • 雷达

    Key Specifications:   High-Speed ADCs (> 5Msps)
    Part Number Resolution (Bits) Sample Rate (max) (Msps) Sample Rate (max) (Msps) AC Specs @ fIN (MHz) SFDR (dBc) ENOB (bits) SINAD (dB) SNR (dB) THD (db) INL (±LSB) DNL (±LSB) Full-Power BW (MHz) Typ. Supply Current (mA) Data Bus Interface
    MAX1420  12 60 60 15 72 10.2 63 66 -69 2 1 150 75 µP/12
    See All High-Speed ADCs (> 5Msps) (81)

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    参考文献: 19-1981; Rev. 1; 2004-05-21
    本页最后一次更新: 2008-02-11



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