The DS1007 7-in-1 Silicon Delay Line reproduces an input logic state at the output after delays at 7 taps. Delays from range from 3ns to 40ns (see table), with a tolerance of ±2ns at room temperature.
By enabling precise timing adjustments, Dallas Silicon Delay Lines improve system performance. They provide an effective, economical solution to the designer working with the complex timing requirements of mismatched ASICs or other components, or with the strict timing tolerances of increasing system clock rates. Each delay line die is laser-optimized and molded into a space-saving SOIC package.
Notes: **This pricing is BUDGETARY, for comparing similar parts. Prices are in
U.S. dollars and subject to change. Quantity pricing may vary
substantially and international prices may differ due to local
duties, taxes, fees, and exchange rates. For volume-specific prices
and delivery, please see the price and availability page
or contact an authorized distributor.
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