ENGLISH 简体中文 日本語 한국어  

MAX9152
800Mbps、LVDS/LVPECL至LVDS、2 x 2交叉点开关


  快速浏览     技术文档     定购信息     更多信息     所有内容  
概述
完整的数据资料 (PDF, 304kB)
英文 Download this datasheet in PDF format下载

he MAX9152 2 x 2 crosspoint switch is designed for applications requiring high speed, low power, and low-noise signal distribution. This device includes two LVDS/LVPECL inputs, two LVDS outputs, and two logic inputs that set the internal connections between differential inputs and outputs.

The MAX9152 can be programmed to connect any input to either or both outputs, allowing it to be used in the following configurations: 2 5 2 crosspoint switch, 2:1 mux, 1:2 demux, 1:2 splitter, or dual repeater. This flexibility makes the MAX9152 ideal for protection switching in fault-tolerant systems, loopback switching for diagnostics, fanout buffering for clock/data distribution, and signal regeneration for communication over extended distances.

Ultra-low 120psPK-PK (max) PRBS jitter ensures reliable communications in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees an 800Mbps data rate and less than 50ps (max) skew between channels.

LVDS inputs and outputs are compatible with the TIA/EIA-644 LVDS standard. The LVDS inputs are designed to also accept LVPECL signals directly, and PECL signals with an attenuation network. The LVDS outputs are designed to drive 75Ω or 100Ω loads, and feature a selectable differential output resistance to minimize reflections.

The MAX9152 is available in 16-pin TSSOP and SO packages, and consumes only 109mW while operating from a single +3.3V supply over the -40°C to +85°C temperature range.

关键特性
  • Pin-Programmable Configuration
    • 2 x 2 Crosspoint Switch
    • 2:1 Mux
    • 1:2 Demux
    • 1:2 Splitter
    • Dual Repeater
  • Ultra-Low 120psPK-PK (max) Jitter with 800Mbps, PRBS = 223 -1 Data Pattern
  • Low 50ps (max) Channel-to-Channel Skew
  • 109mW Power Dissipation
  • Compatible with ANSI TIA/EIA-644 LVDS Standard
  • Inputs Accept LVDS/LVPECL Signals
  • LVDS Output Rated for 75Ω and 100Ω Loads
  • Pin-Programmable Differential Output Resistance
  • Pin-Compatible Upgrade to DS90CP22 (SO Package)
  • Available in 16-Pin TSSOP Package (Half the Size of SO)

Key Specifications:   High-Speed Interconnect (Differential Signaling)
Part Number Features Rx Signal Type Tx Signal Type Functions Number of Rx Number of Tx Data Rates (Mbps) Propagation Delay (max) (ps) Supply Voltage (V) Deterministic Jitter (max) (ps pp) Pulse Skew (max) (ps) Channel-to-Channel Skew (max) (ps) Output Transition Time (max) (ps) ESD Protection (±kV) RoHS Available Package Smallest Available Package (max w/pins) (mm2) Price**
MAX9152 
Pin-Programmable Configuration
Pin-Programmable Output Resistance
LVDS
LVPECL
LVDS
Switch
2 2 800 3400 3.3 120 90 50 480 7 Yes SOIC/16
TSSOP/16
33 $3.49 @ 1k
See All High-Speed Interconnect (Differential Signaling) (131)
Notes:
**This pricing is BUDGETARY, for comparing similar parts. Prices are in U.S. dollars and subject to change. Quantity pricing may vary substantially and international prices may differ due to local duties, taxes, fees, and exchange rates. For volume-specific prices and delivery, please see the price and availability page or contact an authorized distributor.

没有找到你需要的产品吗?
  • 应用工程师帮助选型,下个工作日回复
  • 参数搜索
  • 应用帮助
  •  快速浏览   技术文档   定购信息   更多信息  
     概述 
     关键特性 
     应用/使用 
     关键指标 
     图表 

     数据资料 
     应用笔记 
     设计指南 
     工程期刊 
     可靠性报告 
     软件/模型 
     评估板 

     价格与供货 
     样品 
     在线订购 
     封装信息 
     无铅信息 

     相关产品 
     注释、注解 
     评估板 

    参考文献: 19-2003; Rev. 0; 2001-06-01
    本页最后一次更新: 2007-07-24



          隐私权政策    法律声明

          © 2008 Maxim Integrated Products, Dallas Semiconductor版权所有


    ">