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MAX9257, MAX9258
可编程串行器/解串器,具有UART/I²C控制通道

集成了控制通道的单链路串行/解串器,用于数字视频系统


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概述
完整的数据资料 (PDF, 588kB)
英文 Download this datasheet in PDF format下载

The MAX9257 serializer pairs with the MAX9258 deserializer to form a complete digital video serial link. The MAX9257/MAX9258 feature programmable parallel data width, parallel clock frequency range, spread spectrum, and preemphasis. An integrated control channel transfers data bidirectionally at power-up during video blanking over the same differential pair used for video data. This feature eliminates the need for external CAN or LIN interface for diagnostics or programming. The clock is recovered from input serial data at MAX9258, hence eliminating the need for an external reference clock.

The MAX9257 serializes 10, 12, 14, 16, and 18 bits with the addition of two encoding bits for AC-coupling. The MAX9258 deserializer links with the MAX9257 to deserialize a maximum of 20 (data + encoding) bits per pixel/parallel clock period for a maximum serial-data rate of 840Mbps. The word length can be adjusted to accommodate a higher pixel/parallel clock frequency. The pixel clock can vary from 5MHz to 70MHz, depending on the serial-word length. Enabling parity adds two parity bits to the serial word. The encoding bits reduce ISI and allow AC-coupling.

The MAX9258 receives programming instructions from the electronic control unit (ECU) during the control channel and transmits to the MAX9257 over the serial video link. The instructions can program or update the MAX9257, MAX9258, or an external peripheral device, such as a camera. The MAX9257 communicates with the peripheral device with I²C or UART.

The MAX9257/MAX9258 operate from a +3.3V core supply and feature separate supplies for interfacing to +1.8V to +3.3V logic levels. These devices are available in 40-lead TQFN or 48-pin LQFP packages. These devices are specified over the -40°C to +105°C temperature range.

关键特性   应用/使用
  • 10/12/14/16/18-Bit Programmable Parallel Data Width
  • MAX9258 Does Not Require Reference Clock
  • Parity Protection for Video and Control Channels
  • Programmable Spread Spectrum
  • Programmable Rising or Falling Edge for HSYNC, VSYNC, and Clock
  • Up to 10 Remotely Programmable GPIO on MAX9257
  • Automatic Resynchronization in Case of Loss of Lock
  • MAX9257 Parallel Clock Jitter Filter PLL with Bypass
  • DC-Balanced Coding Allows AC-Coupling
  • 5 Levels of Preemphasis for Up to 20m STP Cable Drive
  • Integrity Test Using On-Chip Programmable PRBS Generator and Checker
  • LVDS I/O Meet ISO10605 ESD Protection (±10kV Contact and ±30kV Air Discharge)
  • LVDS I/O Meet IEC61000-4-2 ESD Protection (±8kV Contact and ±20kV Air Discharge)
  • LVDS I/O Meet ±200V Machine Model ESD Protection
  • -40°C to +105°C Operating Temperature Range
  • Space-Saving, 40-Pin TQFN (5mm x 5mm) with Exposed Pad or 48-Pin LQFP Packages
  • +3.3V Core Supply

 
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    参考文献: 19-1044; Rev. 0; 2008-06-30
    本页最后一次更新: 2008-07-08




             


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